freescale qoriq communications platforms are the next-generation evolution of our leading powerquicc communications processors. the P1022 family of processors, a freescale energy-efficient product solution, is designed to deliver complex application processing performance with exceptional feature integration and high-speed connectivity for ip networking and advanced media processing applications. it combines dual e500 processor cores, built on power architecture ? technology, with enhanced system peripherals and interconnect technology to balance processor performance with i/o system throughput. the P1022 processor includes advanced power and energy management features that enable developers to design next-generation embedded internet media processing applications with energy efficiency levels under the environmental and governmental energy regulatory requirements. the p1013 single-core processor includes the same family of system peripherals, interconnect technology and advanced power and energy management features. highlights dual-core processing the pace of technology development, spurred by the internet and ubiquitous connectivity, is putting additional challenges on design engineers building state-of-the-art embedded appliances or equipment. the P1022 provides the designer exceptional flexibility for leveraging symmetric and asymmetric multiprocessing strategies to reach nearly two gigahertz equivalent single-core performance in ultra-low-power envelopes. equally important are the robust operating systems and tool support to streamline designers adoption of dual-core processing available on the P1022 through freescale and freescale partners. high-speed connectivity freescales P1022 processor is positioned to offer a wide range of high-speed connectivity options. the flexibility of the processor is due to highly integrated speed- and latency- optimized technology. it is a highly scalable processor designed to handle complex, computationally demanding processing tasks with ease. the P1022 processor includes virtualized enhanced three-speed ethernet with tcp/udp/ip offload, direct fifo mode for asic connectivity, sata for local storage and support for three pci express ? interface options. moreover, the P1022 processor features a field-proven, next-generation memory controller and an optional hardware acceleration engine for encryption protocols and raid processing. qoriq communications platforms p1 series p1013/P1022 embedded processors with advanced energy management qoriq P1022 and p1013 block diagram 32 kb l1 i-cache power architecture ? e500 core 32 kb l1 d-cache 256 kb l2 cache 32 kb l1 i-cache power architecture e500 core 32 kb l1 d-cache ddr2/ddr3 sdram controller not on p1013 coherency module system bus 2-ch. dma controller 2-ch. dma controller 3 x pci express ? on-chip network on-chip network 4-lane serdes (pci express/ sgmii) security acceleration xor advanced power management duart, 2 x i 2 c, timers, interrupt control, sd/mmc, spi, 2 x usb 2.0/ulpi, mpic 2 x gigabit ethernet rgmii x2 serdes (pci express/ sata/sgmii) enhanced local bus controller (elbc) cores 2 x sata lcd (diu) tdm/ i 2 s
freescale, the freescale logo and powerquicc are trademarks of freescale semiconductor, inc., reg. u.s. pat. & tm. off. the energy effcient solutions logo, qoriq and quicc engine are trademarks of freescale semiconductor, inc. all other product or service names are the property of their respective owners. the power architecture and power.org word marks and the power and power.org logos and related marks are trademarks and service marks licensed by power.org. ? 2009, 2010, 2011 freescale semiconductor, inc. document number: qP1022fs / rev 1 system-level cost saving the P1022 processors highly integrated architecture is designed to enhance performance and deliver system-level cost savings in a small board footprint. key system-level peripherals include dual gigabit ethernet, dual usb 2.0, dual sata, sd/ mmc and triple pci express interconnects. furthermore, the P1022 integrates lcd controller, i 2 s audio and voip tdm interfaces for use in creating engaging human interfaces. special care was taken to design the P1022 processors pin locations for mounting on low-cost six layer pcbs. the P1022 is a full-featured, high-performance gigahertz processor that is designed to support fanless operation for power-sensitive applications. advanced energy-efficient modes balancing the performance requirements for powerful new networking- and internet- centric applications, with the increasing concerns over energy consumption, is driving manufacturers to develop intelligent strategies for optimizing performance within specific energy budgets. this is a key challenge for the next-generation green embedded systems. the P1022 processor implements sophisticated power-saving modes for managing energy consumption in both dynamic and static power modes. these include the traditional nap, doze plus the jog (dynamic frequency scaling) and packet- lossless deep-sleep modes. designers may leverage these modes to efficiently match work accomplished with the correct level of energy consumed. the combination of these features makes the P1022 processor an optimal embedded processing solution for ethernet or pci express interworking applications, such as enterprise networking, industrial, storage, security and office automation applications. examples include control plane processing, protocol processing, media processing while producing an engaging human machine interface. key features ? dual (P1022) or single (p1013) high- performance e500v2 cores built on power architecture technology 36-bit physical addressing double precision floating point support signal processing engine (spe) apu (auxiliary processing unit) 32 kb l1 instruction cache and 32 kb l1 data cache for each core 600 mhz to 1055 mhz core clock frequency ? 256 kb l2 cache with ecc, also configurable as sram and stashing memory ? 64-bit ddr2/ddr3 sdram memory controller with ecc support ? two 10/100/1000 mbps virtualized enhanced three-speed ethernet controllers (etsecs) tcp/ip acceleration and classification capabilities ieee ? 1588 support loseless flow control rmii, rgmii, sgmii ? integrated security engine (optional) crypto algorithm support includes 3des, aes, rsa/ecc, md5/sha, arc4, kasumi, snow 3g and fips deterministic rng single pass encryption/message authentication for common security protocols (ipsec, ssl, srtp, wimax) xor acceleration ? high-speed interfaces (not all available simultaneously) six serdes lanes (multiplexed across controllers) one x4 and two x1 pci express interfaces two serial ata (sata) interfaces two sgmii interfaces ? audio visual interfaces lcd interface supporting a display of 1280 x 1024p @ 60 hz, 24 bits per pixel i 2 s interface with maximum sampling frequency of 192 khz ? voip tdm interface support for up to 128 channels ? two high-speed usb controllers (usb 2.0) host and device support enhanced host controller interface (ehci) ulpi interface to phy ? enhanced secure digital host controller (sd/mmc) ? serial peripheral interface ? programmable interrupt controller (pic) compliant with open-pic standard ? dual four-channel dma controllers ? dual i 2 c controllers, duart, timers ? enhanced local bus controller (elbc) ? advanced power and energy management low power operation support for dynamic and static power management doze, nap and sleep modes for dynamic power management packet-lossless deep sleep: power removed from major portion of the chip pmc wake on: filtered lan activity, usb connection, gpio, internal timer or external interrupt event ? up to 87 general-purpose signals ? available in extended temperature (optional) ? 689-pin tepbga package learn more: for current information about freescale products and documentation, please visit freescale.com/qoriq .
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